1. Fields of the Invention
The present invention relates to a control process for addressing an AC type plasma panel. For components used for addressing operations, its implementation makes it possible in particular to reduce the performance required from these components and hence to reduce their cost. The invention also relates to a plasma panel operating according to this process.
2. Discussion of the Background
Plasma panels or plasma screens, abbreviated to xe2x80x9cPAPsxe2x80x9d in the subsequent description, are flat display screens which use the emission of radiation in the visible or ultra-violet spectrum from a discharge in gases.
PAPs consist mainly of two large families, PAPs of the so-called DC type and PAPs of the so-called AC type. PAPs of the AC type, owing to their particular structure, benefit operationally from an effect referred to as the xe2x80x9cmemory effectxe2x80x9d which renders them especially suitable in constructing large screens with a large number of elementary cells, both for professional applications and those aimed at the general public, such as for example high-definition colour television.
There are various types of AC PAP:
for example PAPs which use only two electrodes crossed to define a cell and to carry out its addressing and its activation, as described in French Patent 2 417 848:
or else AC PAPs of the so-called xe2x80x9ccoplanar sustainxe2x80x9d type, known in particular through the European Patent document EP-A-0135 382, and in which each cell is defined at the crossing of a pair of so-called sustain electrodes with one or more other electrodes used more particularly for addressing the cells.
With AC PAPs, the addressing functions and those aimed at producing the light energy are separated: the production of light results from the xe2x80x9cparallelxe2x80x9d application to all the cells of a square-wave strobe signal referred to as the xe2x80x9csustain signalxe2x80x9d.
By contrast, the addressing of the cells demands that it be possible to control each line and each column of cells in an individualized manner. The electronic means serving to carry out these individualized controls are relatively complex and expensive, this being all the more penalizing as the market for PAPs moves towards ever larger panels.
The operation of an AC PAP is explained further hereafter with reference to FIG. 1. To simplify the explanations, the diagram shown in FIG. 1 is that of a PAP with two electrodes crossed to define a cell.
The PAP comprises a screen 1 formed with the aid of a network of electrodes Y1 to Y6 referred to as xe2x80x9cline electrodesxe2x80x9d, which is crossed with a second network of electrodes X1 to X6 referred to as column electrodes. To each intersection of line and column electrodes there corresponds a cell C1 to C36. These cells are thus arranged along lines L1 to L6 and columns CL1 to CL6. In the example of FIG. 1, only 6 electrodes of each type are represented, but a PAP can include 1000 or more line electrodes and as many column electrodes, defining 1 million or more cells.
Each line electrode Y1 to Y6 is linked to a line output stage SY1 to SY6 of a line management device 2, and each column electrode X1 to X6 is linked to a column output stage SX1 to SX6 of a column management device 3. The operation of these two management devices 2, 3 is controlled by an image management device 4.
The line management device 2 comprises:
at least one circuit referred to as a sustain amplifier A1, producing signals referred to as xe2x80x9csustain signalsxe2x80x9d SE serving in activating the cells C1 to C36; given the sizeable power under which the SE signals may possibly have to be delivered, they may be supplied with the aid of a first and of a second amplifier A1, A2 as in the example shown;
it also includes in the non-limiting example represented, a first and a second line control circuit 6, 7 (which correspond to the circuits referred to as xe2x80x9cline driversxe2x80x9d by experts in the field). In the simplified representation shown in FIG. 1 of the first and of the second line control circuit 6, 7, these latter respectively each comprise three switching stages M1 to M3 and M4 to M6 each linked to the input of a line output stage SY1 to SY3 and SY4 to SY6, in such a way that the first circuit 6 controls the first three line electrodes Y1 to Y3 and that the second circuit 7 controls the following three electrodes Y4 to Y6.
Each line control circuit 6, 7 is linked to one of the amplifiers A1, A2, from which it receives the sustain signals SE, and its function is in particular: on the one hand, to forward these signals SE in such a way that they are applied simultaneously to all the line electrodes Y1 to Y6 which it controls; its function is on the other hand, for the electrode or electrodes selected for an addressing operation, to superimpose either a so-called write pulse IS or a so-called erase pulse IE onto the sustain signals SE, depending on the type of addressing to be carried out.
The column management device 3 has in particular the function of applying, to the column electrodes X1 to X6, a reference potential, with respect to which so-called masking pulses IM are applied to some of these electrodes during addressing operations. To this end, it employs a column control circuit 8, similar for example to the line control circuits 6, 7, and comprising in the example, 6 switching stages M7 to M12 each linked to a column output stage SX1 to SX6, and which are responsible for formulating and switching the masking pulses.
In a PAP, each cell includes a gas-filled space. By applying a sufficient voltage referred to as the xe2x80x9cturn-on voltagexe2x80x9d VA between the two electrodes which define a given cell, an electric discharge is caused in the gas, giving rise to the emission of light by this cell. In an AC PAP, the electrodes are covered with a dielectric material. Accordingly, with each discharge into the gas, electric charges accumulate on the dielectric near the electrodes which define a cell within which the discharge occurs. These electric charges persist after the discharge and constitute an electric field referred to as the xe2x80x9cinternal memory fieldxe2x80x9d specific to each cell, and make it possible, in respect of the cell which possesses it, to cause a discharge with the application of a voltage below the turn-on voltage. This effect constitutes the xe2x80x9cmemory effectxe2x80x9d already mentioned. The cells which posseses such charges are said to be in the xe2x80x9cwrittenxe2x80x9d or xe2x80x9conxe2x80x9d state. To produce a discharge, the other cells demand a voltage equal to the turn-on voltage, they are said to be in the xe2x80x9cerasedxe2x80x9d or xe2x80x9coffxe2x80x9d state.
The effect of applying the sustain signals SE is to activate the cells C1 to C36 which are in the xe2x80x9cwrittenxe2x80x9d state, that is to say to cause discharges in these cells, without modifying their state or the state of the cells which are in the xe2x80x9cerasedxe2x80x9d state. The cells are set to the xe2x80x9cwrittenxe2x80x9d state or the xe2x80x9cerasedxe2x80x9d state depending on an image to be displayed, by addressing operations which are often carried out line by line, that is to say for all the cells C1 to C36 belonging to the same line L1 to L6 (or stated otherwise, for all the cells defined along the same line electrode Y1 to Y6), and then subsequently for all the cells of another line.
FIG. 2a represents sustain signals SE of a common type, which are intended to be applied to all the line electrodes Y1 to Y6. They consist of negative voltage strobes 9 and positive voltage strobes 10 established on either side of a reference potential V0 (which is often the potential of earth), and which follow one another with opposite polarities. They vary between a negative potential V1 where they exhibit a so-called negative porch pxe2x88x92, and a positive potential V2 where they exhibit a so-called positive porch p+. These negative and positive potentials V1, V2 have for example a value of 150 volts, which is added to the voltage produced by the internal memory field, so as to reach substantially the turn-on voltage value VA. According to a common form, the voltage transition which follows the end of a strobe 9; 10 can lead directly to the start of the following strobe, or else as in the example shown: on the one hand the negative strobes 9 are separated from the positive strobe 10 which follows by a wide intermediate porch 5, formed at the level of the reference potential V0 and intended to serve as base for an addressing pulse; and on the other hand, each positive strobe 10 is separated from the negative strobe which follows by a narrow intermediate porch 11, formed on the reference potential V0.
The reference potential V0 is applied to the column electrodes X1 to X6 in such a way that the application of each of the positive and negative strobes of the sustain signals SE to the line electrodes Y to Y6 develops at the terminals of the cells, alternating voltages of opposite signs, which give rise to so-called sustain discharges in all the cells which are in the xe2x80x9cwrittenxe2x80x9d state.
FIG. 2b represents the phase relation between the sustain discharges Id in the cells C1 to C36, and the establishing of the strobes 9, 10. It may be seen that these discharges occur at instants td arising slightly after each start of the negative and positive porches pxe2x88x92, p+; in fact these discharges arise a few hundred nanoseconds after the establishment of these porches.
The strobes 9, 10 of the sustain signal SE follow one another with a period P1, P2, P3, P4 (commonly of the order of 20 microseconds), during which the addressing of all the cells defined by a elected line electrode (or by several in certain cases) is performed. The addressing operations are executed by the line and column control circuits 6, 7, which deliver specific signals for this purpose. The addressing consists, for the line control circuit 6, 7 and with the aid in particular of that of the switching stages M1 to M6 corresponding to the selected line electrode, in superimposing an erase pulse IE followed by a write pulse IS onto the sustain signal SE applied to this electrode.
FIGS. 2c, 2d and 2e respectively illustrate addressing operations performed on the cells of the line electrodes Y1, Y2 and Y3, which electrodes are controlled by the first line control circuit 6.
Assuming that the addressing of the line electrode Y1 is performed during a period P1 starting at an instant t0: the function of the signal applied solely to this electrode is to set all the cells of this electrode to the xe2x80x9cerasedxe2x80x9d state. For this purpose, in the addressing form shown by way of example, a so-called erase addressing pulse IE, of positive polarity, is superimposed at an instant t1 on the wide intermediate porch 5 (that is to say the voltage corresponding to the amplitude of the pulse is added algebraically to the voltage onto which it is superimposed and hence which serves as base therefor) This erase pulse IE can exhibit a relatively slow rise time Tm, and its amplitude V4 is such that its summit reaches a value V3 referred to as the xe2x80x9cerase voltagexe2x80x9d, slightly below for example the voltage V2 of the positive strobes 10. Such a signal, applied to the line electrode Y1 while the reference potential V0 is applied to all the column electrodes, causes a start of discharge in the cells which are in the xe2x80x9cwrittenxe2x80x9d state, and its effect is to absorb the accumulated electric charges and hence eliminate the internal memory fields near all the cells.
Erasure can also be accomplished with the aid of an erase pulse IExe2x80x2 (represented dashed) superimposed t the instant t0 during the establishing of the negative strobe 9, and the shape of which makes it possible to confer a long time on this establishing time without modifying its amplitude. It should be noted that this addressing is accomplished under the action of the first switching stage M1 so as to be applied solely to the first line electrode Y1.
All the cells of the selected electrode Y1 having been erased, the next phase consists in setting to the xe2x80x9cwrittenxe2x80x9d state only the selected cell or cells. To this end, a write pulse IS is superimposed on the sustain signal SE at an instant t2, on the positive porch p+. The pulse IS has an amplitude V5 such that with this superposition, the resulting voltage V2+V5 reaches a so-called write voltage value which is comparable with the turn-on voltage VA. If at this moment the potential delivered by all the column output stages SX1 to SX6, that is to say the potential applied to all the column electrodes X1 to X6, is that of the reference potential V0, the potential difference at the terminals of the cells C1 to C6 formed with the line electrode Y1 possesses the value of the turn-on voltage VA: accordingly, discharges occur in all the cells which consequently benefit from an internal memory field and are therefore in the xe2x80x9cwrittenxe2x80x9d state.
To effect the selection of the cells, the column electrode management device 3 produces, with each write pulse IS, a xe2x80x9cmaskingxe2x80x9d sequence which consists in applying to those of the column electrodes X1 to X6 which define a cell having to remain in the xe2x80x9cerasedxe2x80x9d state, a masking pulse IM in phase with the write pulse IS and the function of which is to prevent the potential difference at the terminals of these cells from reaching the turn-on value VA, and thus to disable the action of the write pulse IS.
FIG. 2f represents a masking pulse IM delivered on the second column electrode X2, at the instant t2, that is to say in phase with the write pulse IS applied to the first line electrode Y1. The masking pulse IM is positive, and its presence at this instant means that, at the end of the cycle for addressing the first line electrode Y1, the cell C2 retains an xe2x80x9cerasedxe2x80x9d state.
FIG. 2d illustrates the addressing performed on the second line electrode Y2 (with the aid of the second switching stage M2), during a second period P2 which follows the first period P1. As in the previous case, the addressing starts with an erasing of all the cells (C7 to C12 in the present case) with the aid of an erase pulse IE, superimposed on a wide intermediate porch 5 at an instant t3, this being solely for the second line electrode Y2. Next, at an instant t4, a write pulse IS is superimposed on the positive porch 10 and causes all those cells of this line for which no masking pulse IM is applied to the corresponding column electrode X1 to X6 to be set to the xe2x80x9cwrittenxe2x80x9d state. It should be noted that no masking pulse (FIG. 2f) being applied to the second column electrode X2 at the instant t4, the cell C8 is set to the xe2x80x9cwrittenxe2x80x9d state.
FIG. 2e shows the addressings performed on the third line electrode Y3 (with the aid of the third switching stage M3), during a third period P3 which follows the second P2. At an instant t5, an erase pulse IE is superimposed on the wide intermediate porch p1. Next, at an instant t6, a write pulse IS is superimposed on the positive porch p+. The addressing (not represented) on the line electrodes Y4, Y5, Y6 is then performed in the same way, beginning with that of the electrode Y4 which is performed during the period P4.
The addressing operations described above are of two types: the addressing which consists in setting all the cells of the same line electrode to the same xe2x80x9cerasedxe2x80x9d state without distinction, and of the xe2x80x9csemi-selective addressingxe2x80x9d type, and that which consists in setting selected cells to the xe2x80x9cwrittenxe2x80x9d state and of the xe2x80x9cselective addressingxe2x80x9d type. However, semi-selective and selective addressings can also consist in setting all the cells of the same line to the xe2x80x9cwrittenxe2x80x9d state for xe2x80x9csemi-selectivexe2x80x9d, and to the xe2x80x9cerasedxe2x80x9d state certain selected cells, as far as xe2x80x9cselectivexe2x80x9d is concerned. These explanations regarding the operation of an AC PAP highlight the importance, the large number and the complexity of the functions fulfilled by a line or column control circuit 6, 7 or 8. To cater for all these functions, these control circuits are themselves complex electronic components. The higher the performance demanded of these components, the more sophisticated and expensive are the technologies employed in their manufacture.
Among the technical characteristics which these control circuits must exhibit, those which relate to their capacity to deliver high voltage pulses are especially expensive to achieve. This is yet more pronounced as regards their ability to deliver, simultaneously on their various outputs, signals exhibiting large voltage differences, as is the case in the addressing operations, both in respect of the line control circuits 6, 7 which deliver addressing pulses IE, IS, and in respect of the column control circuit delivering masking pulses IM.
It should be observed that the line control circuits 6, 7 must exhibit technical characteristics of much greater performance in order to deliver the addressing pulses IS, IE than to deliver the sustain signals SE. This is because the latter are applied continuously to all the electrodes Y1 to Y6, they need not be selected or switched, they are formulated by the amplifiers A1, A2 and merely pass through the switching stages M1 to M6. The addressing pulses on the other hand use various complex electronic circuits so as to be constructed, selected, switched and superimposed on the sustain signals with the appropriate synchronism and appropriate rate, and with sufficient power to possibly give rise to discharges in a large number of cells simultaneously.
The importance of the problem raised by the cost of these control circuits is tending to increase further, on account in particular of the ever wider applications of PAPs to the displaying of large-size colour images, since the production of colours requires gas mixtures having higher turn-on (ignition) voltages VA.
One of the aims of the present invention is to allow the use, within AC PAPs, of line control and/or column control circuits exhibiting the lower cost.
Another purpose of the invention is to reduce the so-called capacitive consumption of AC PAPs. The capacitances exhibited by the various elements, such as for example the tracks which constitute the electrodes, the various connections, and the self-capacitances of the electronic circuits, form a relatively sizeable overall capacitance which consumes AC currents. The capacitive power PC dissipated by an addressing pulse is expressed through the following relation:
PC=Cxc2x7Vi2xc2x7F; where C is the capacitance seen by the pulse, Vi is the value of the voltage of the addressing pulse, F is the addressing frequency. This relation shows in particular that this capacitive power varies with the square of the amplitude of the pulse.
To achieve the aforementioned purposes, the invention proposes that the selective and/or semi-selective addressings be done in a manner which makes it possible to reduce the amplitude of the addressing pulses distributed by the control circuits 6, 7, 8.
The invention relates to a control process for addressing an AC plasma panel comprising at least one network of so-called xe2x80x9clinexe2x80x9d electrodes, crossed with at least one network of so-called column electrodes, cells being formed at the intersections of the line and column electrodes, the said process consisting in applying to all the line electrodes sustain signals formed of a succession of strobes having a given period and established with respect to a reference potential applied to the column electrodes, each period being able to constitute an addressing cycle comprising at least one addressing of the semi-selective type and at least one addressing of the selective type, each type of addressing consisting in applying to at least one selected line electrode a so-called addressing pulse whose voltage is added to a so-called line voltage already present on this electrode, with a view to applying to the terminals of cells formed by this selected electrode a so-called addressing voltage of given value corresponding to the addressing to be performed, the process being characterized in that for at least one of the two types of addressing, the addressing pulse has an amplitude below that which is appropriate for obtaining the required addressing voltage, and in that to obtain the said addressing voltage, it furthermore consists either in modifying the reference potential applied to the column electrodes, or in modifying the line voltage already present on the selected line electrode when the addressing pulse is applied, or alternatively in modifying this latter line voltage as well as the reference potential applied to the column electrodes.
The process according to the invention consists in superimposing at least one voltage porch referred to as the supplementary porch on the sustain signals during a period of these latter, in such a way as to constitute a voltage base referred to as the addressing base onto which is superimposed at least one addressing pulse.
The signals being formed of negative and positive strobes, the process according to the invention consists in forming a write addressing voltage base with a strobe, and of superimposing an addressing pulse consisting of a so-called write pulse onto this addressing base.
The process consists in establishing between two consecutive strobes an intermediate porch having a voltage below the voltage of the strobes, and in adding a supplementary porch to the said intermediate porch so as to constitute an erase addressing base, then in superimposing an addressing pulse consisting of an erase pulse onto this erasure base.
The intermediate porch is at the same voltage as the reference potential.
The supplementary porches added onto strobes are superimposed on these latter after an instant at which a so-called sustain discharge occurs.
The supplementary porches formed on strobes are deleted substantially at the end of these strobes.
The supplementary porches formed on strobes encompass the entirety of the pulse or pulses for addressing a selected line electrode.
The supplementary porches serving to constitute an erasure base have an amplitude equal to or greater than the difference between a so-called erasure voltage and the amplitude of the erase pulses.
The supplementary porches serving to constitute a write base have an amplitude equal to or greater than the difference between a so-called writing voltage and a voltage value formed by the sum of the voltage of a positive strobe and of the amplitude of a write pulse.